1. Field of the Invention
The present invention relates to a semiconductor device and manufacturing method thereof, and is applied to, e.g., a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) having an offset-spacer.
2. Description of the Related Art
There has conventionally been proposed a semiconductor device utilizing a so-called offset structure. This device improves the drain breakdown voltage or the like by setting the interval between the gate and the drain larger than that between the gate and the source (see, e.g., Hokazono, A. et al., “14 nm gate length CMOSFETs utilizing low thermal budget process with poly-SiGe and Ni salicide”, Electron Devices Meeting, 2002. IEDM '02. Digest. International, 8–11 Dec. 2002, P. 639–642).
A conventional semiconductor device and manufacturing method thereof will be explained in detail with reference to FIGS. 1 to 3. FIG. 1 is a sectional view showing the conventional semiconductor device. As shown in FIG. 1, in the conventional semiconductor device, offset-spacers 11 are formed from the same material, e.g., a silicon oxide film with the same shape on the right and left side walls of a gate electrode 12. Left and right dopant diffusion regions serving as a source 13 and drain 14 also have the same shape, dopant concentration, and depth. The offset-spacers 11 are arranged on the right and left of the gate electrode 12, and formed from a material such as a silicon oxide film with a thickness of, e.g., about 4 nm. The offset-spacers 11 separate the gate electrode 12 from doping of a dopant into a shallow dopant diffusion region (extension region). In operation, the offset-spacers 11 suppress the spread of the depletion layer, relaxing the short-channel effect.
However, this structure sometimes fails to satisfactorily relax the short-channel effect along with a recent shrinkage in cell size. In the conventional structure, the offset-spacer 11 on the drain 14 which receives a high electric field is not thick enough. The source 13 and drain 14 have the same dopant concentration and depth. As a result, the spread of the depletion layer cannot be fully suppressed, and the short-channel effect cannot be sufficiently relaxed. This leads to a small operation margin and poor reliability.
A conventional semiconductor device manufacturing method will be described with reference to FIGS. 2 and 3. An offset-spacer material 15 is isotropically deposited and grown on the entire surface.
As shown in FIG. 3, the offset-spacer material 15 is etched back and left on the side walls of a gate electrode 12 to form offset-spacers 11.
For this reason, the film thicknesses of the right and left offset-spacers 11 on the gate electrode 12 cannot be changed. The offset-spacers 11 can only be formed from the same material.
Shallow dopant diffusion regions (extension regions) 16 serving as a source 13 and drain 14 are formed by ion implantation. The ion implantation step of forming the shallow dopant diffusion regions (extension regions) 16 cannot form dopant diffusion regions having different profiles on the right and left of the gate electrode 12.
As described above, the conventional semiconductor device manufacturing method suffers low selectivity: the film thickness and material of the offset-spacer cannot be easily selected and the depth and concentration of the dopant diffusion region cannot be easily selected. As a result, optimal values cannot be selected for the offset-spacer and dopant diffusion region, degrading the reliability.